Cui, aijiao: search on Z-Library

The world's largest scientific articles store. 70,000,000+ articles for free.

Don't use scam websites

1

A Guaranteed Secure Scan Design based on Test Data Obfuscation by Cryptographic Hash

Cui, Aijiao, Li, Mengyang, Qu, Gang, Li, Huawei

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2020

Language:

english

File:

PDF, 2.61 MB

english, 2020

2

A Robust FSM Watermarking Scheme for IP Protection of Sequential Circuit Design

Aijiao Cui, Chip-Hong Chang, Tahar, S., Abdel-Hamid, A.T.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2011

Language:

english

File:

PDF, 1.20 MB

english, 2011

3

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - An improved publicly detectable watermarking scheme based on scan chain ordering

Cui, Aijiao, Chang, Chip-Hong

Year:

2009

Language:

english

File:

PDF, 770 KB

english, 2009

4

[IEEE 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008 - Seattle, WA, USA (2008.05.18-2008.05.21)] 2008 IEEE International Symposium on Circuits and Systems - Intellectual property authentication by watermarking scan chain in design-for-testability flow

Aijiao Cui,, Chip-Hong Chang,

Year:

2008

Language:

english

File:

PDF, 158 KB

english, 2008

5

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - A hybrid watermarking scheme for sequential functions

Cui, Aijiao, Chang, Chip-Hong, Zhang, Li

Year:

2011

Language:

english

File:

PDF, 308 KB

english, 2011

6

[IEEE 2013 IEEE International Symposium on Circuits and Systems (ISCAS) - Beijing (2013.5.19-2013.5.23)] 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) - A power-efficient scan tree design by exploring the Q'-D connection

Linfeng Chen,, Aijiao Cui,

Year:

2013

Language:

english

File:

PDF, 463 KB

english, 2013

7

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - A low-overhead dynamic watermarking scheme on scan design for easy authentication

Cui, Aijiao, Liang, Wei, Qu, Gang

Year:

2014

Language:

english

File:

PDF, 554 KB

english, 2014

8

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - Watermarking for IP Protection through Template Substitution at Logic Synthesis Level

Cui, Aijiao, Chang, Chip-Hong

Year:

2007

Language:

english

File:

PDF, 281 KB

english, 2007

9

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - A new decompressor with ordered parallel scan design for reduction of test data and test time

Yu, Tingting, Cui, Aijiao, Li, Mengyang, Ivanov, Andre

Year:

2015

Language:

english

File:

PDF, 640 KB

english, 2015

10

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - An improved scan design for minimization of test power under routing constraint

Cui, Aijiao, Yu, Tingting, Qu, Gang, Li, Mengyang

Year:

2015

Language:

english

File:

PDF, 881 KB

english, 2015

11

[IEEE 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - Montréal, QC, Canada (2016.5.22-2016.5.25)] 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - A new countermeasure against scan-based side-channel attacks

Luo, Yanhui, Cui, Aijiao, Qu, Gang, Li, Huawei

Year:

2016

Language:

english

File:

PDF, 653 KB

english, 2016

12

[IEEE 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - Montréal, QC, Canada (2016.5.22-2016.5.25)] 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - An improved test power optimization method by insertion of linear functions

He, Lucheng, Cui, Aijiao, Li, Mengyang, Ivanov, Andre

Year:

2016

Language:

english

File:

PDF, 615 KB

english, 2016

13

[IEEE 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - Baltimore, MD, USA (2017.5.28-2017.5.31)] 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - Practical IP watermarking and fingerprinting methods for ASIC designs

Chen, Xi, Qu, Gang, Cui, Aijiao

Year:

2017

File:

PDF, 699 KB

2017

14

[IEEE 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - Baltimore, MD, USA (2017.5.28-2017.5.31)] 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - A new watermarking scheme on scan chain ordering for hard IP protection

Huang, Xiaonan, Cui, Aijiao, Chang, Chip-Hong

Year:

2017

Language:

english

File:

PDF, 300 KB

english, 2017

15

[IEEE 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Sapporo, Japan (2019.5.26-2019.5.29)] 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - A New Pay-Per-Use Scheme for the Protection of FPGA IP

Sun, Peiqi, Cui, Aijiao

Year:

2019

Language:

english

File:

PDF, 360 KB

english, 2019

16

IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level

Aijiao Cui, Chip Hong Chang, Tahar, S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2008

Language:

english

File:

PDF, 555 KB

english, 2008

17

Synthesis-for-Testability Watermarking for Field Authentication of VLSI Intellectual Property

Chip-Hong Chang,, Aijiao Cui

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Year:

2010

Language:

english

File:

PDF, 895 KB

english, 2010

18

A refined affine approximation method of multiplication for range analysis in word-length optimization

Sun, Ruiyi, Zhang, Yan, Cui, Aijiao

Journal:

EURASIP Journal on Advances in Signal Processing

Year:

2014

Language:

english

File:

PDF, 413 KB

english, 2014

19

[IEEE 2013 International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics) - Guangzhou, China (2013.11.16-2013.11.18)] 2013 International Conference on Computer-Aided Design and Computer Graphics - An Efficient Zero-Aliasing Space Compactor Based on Elementary Gates Combined with XOR Gates

Liu, Yongxia, Cui, Aijiao

Year:

2013

Language:

english

File:

PDF, 185 KB

english, 2013

20

[IEEE APCCAS 2012-2012 IEEE Asia Pacific Conference on Circuits and Systems - Kaohsiung, Taiwan (2012.12.2-2012.12.5)] 2012 IEEE Asia Pacific Conference on Circuits and Systems - A post-processing scan-chain watermarking scheme for VLSI intellectual property protection

Cui, Aijiao, Chang, Chip-Hong

Year:

2012

Language:

english

File:

PDF, 410 KB

english, 2012

21

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Stego-signature at logic synthesis level for digital design IP protection

Aijiao Cui,, Chip-Hong Chang,

Year:

2006

Language:

english

File:

PDF, 3.00 MB

english, 2006

22

[IEEE APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - Singapore (2006.12.4-2006.12.7)] APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - Kernel Extraction for Watermarking Combinational Logic Networks

Cui, Aijiao, Chang, Chip-Hong

Year:

2006

Language:

english

File:

PDF, 4.38 MB

english, 2006

23

Design of Optimal Scan Tree Based on Compact Test Patterns for Test Time Reduction

Chen, linfeng, Cui, aijiao, Chang, Chip Hong

Journal:

IEEE Transactions on Computers

Year:

2015

Language:

english

File:

PDF, 2.42 MB

english, 2015

24

Ultra-low Overhead Dynamic Watermarking on Scan Design for Hard IP Protection

Cui, aijiao, Qu, Gang, Zhang, Yan

Journal:

IEEE Transactions on Information Forensics and Security

Year:

2015

Language:

english

File:

PDF, 469 KB

english, 2015

25

[IEEE 2014 International Symposium on Integrated Circuits (ISIC) - Singapore (2014.12.10-2014.12.12)] 2014 International Symposium on Integrated Circuits (ISIC) - An improved scan cell ordering method using the scan cells with complementary outputs

Li, Mengyang, Cui, Aijiao, Yu, Tingting

Year:

2014

File:

PDF, 136 KB

2014

26

[IEEE 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics) - Xi'an, China (2015.8.26-2015.8.28)] 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics) - Reliable and Anti-cloning PUFs Based on Configurable Ring Oscillators

Gao, Mingze, Lai, Khai, Zhang, Jiliang, Qu, Gang, Cui, Aijiao, Zhou, Qiang

Year:

2015

Language:

english

File:

PDF, 380 KB

english, 2015

27

A New Robust Dual Intellectual Property Watermarking Algorithm Based on Field Programmable Gate Array

Liang, Wei, Long, Jing, Cui, Aijiao, Peng, Li

Journal:

Journal of Computational and Theoretical Nanoscience

Year:

2015

Language:

english

File:

PDF, 583 KB

english, 2015

28

Static and Dynamic Obfuscations of Scan Data Against Scan-based Side-channel Attacks

Cui, Aijiao, Luo, Yanhui, Chang, Chip-Hong

Journal:

IEEE Transactions on Information Forensics and Security

Year:

2016

Language:

english

File:

PDF, 1.04 MB

english, 2016

29

Why current secure scan designs fail and how to fix them?

Cui, Aijiao, Luo, Yanhui, Li, Huawei, Qu, Gang

Journal:

Integration, the VLSI Journal

Year:

2017

Language:

english

File:

PDF, 1.08 MB

english, 2017

30

[IEEE 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST) - Yilan, Taiwan (2016.12.19-2016.12.20)] 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST) - An ultra-low overhead LUT-based PUF for FPGA

Jiadong Wang,, Cui, Aijiao, Mengyang Li,, Qu, Gang, Li, Huawei

Year:

2016

Language:

english

File:

PDF, 267 KB

english, 2016

31

[IEEE 2017 18th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2017.3.14-2017.3.15)] 2017 18th International Symposium on Quality Electronic Design (ISQED) - Scan chain based IP fingerprint and identification

Chen, Xi, Qu, Gang, Cui, Aijiao, Dunbar, Carson

Year:

2017

Language:

english

File:

PDF, 7.23 MB

english, 2017

32

[IEEE 2017 IEEE 26th Asian Test Symposium (ATS) - Taipei City, Taiwan (2017.11.27-2017.11.30)] 2017 IEEE 26th Asian Test Symposium (ATS) - How to Secure Scan Design Against Scan-Based Side-Channel Attacks?

Zhou, Wei, Cui, Aijiao, Li, Huawei, Qu, Gang

Year:

2017

Language:

english

File:

PDF, 383 KB

english, 2017

33

[IEEE 2017 IEEE 26th Asian Test Symposium (ATS) - Taipei City, Taiwan (2017.11.27-2017.11.30)] 2017 IEEE 26th Asian Test Symposium (ATS) - A New Active IC Metering Technique Based on Locking Scan Cells

Cui, Aijiao, Qian, Xuesen, Qu, Gang, Li, Huawei

Year:

2017

Language:

english

File:

PDF, 332 KB

english, 2017

34

[IEEE 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Jeju, Korea (South) (2018.1.22-2018.1.25)] 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - A low-overhead PUF based on parallel scan design

Wang, Wenxuan, Cui, Aijiao, Qu, Gang, Li, Huawei

Year:

2018

Language:

english

File:

PDF, 431 KB

english, 2018

35

[IEEE 2018 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom/BigDataSE) - New York, NY, USA (2018.8.1-2018.8.3)] 2018 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications/ 12th IEEE International Conference On Big Data Science And Engineering (TrustCom/BigDataSE) - Partial Scan Design Against Scan-Based Side Channel Attacks

Chen, Xi, Lu, Zhaojun, Qu, Gang, Cui, Aijiao

Year:

2018

Language:

english

File:

PDF, 473 KB

english, 2018

36

[IEEE 2018 IEEE International Test Conference in Asia (ITC-Asia) - Harbin, China (2018.8.15-2018.8.17)] 2018 IEEE International Test Conference in Asia (ITC-Asia) - Balancing Testability and Security by Configurable Partial Scan Design

Chen, Xi, Aramoon, Omid, Qu, Gang, Cui, Aijiao

Year:

2018

Language:

english

File:

PDF, 336 KB

english, 2018

37

[IEEE 2018 IEEE 27th Asian Test Symposium (ATS) - Hefei, China (2018.10.15-2018.10.18)] 2018 IEEE 27th Asian Test Symposium (ATS) - A New Scheme to Extract PUF Information by Scan Chain

Cui, Aijiao, Zhou, Wei, Qu, Gang, Li, Huawei

Year:

2018

Language:

english

File:

PDF, 321 KB

english, 2018

38

[IEEE 2019 IEEE 37th VLSI Test Symposium (VTS) - Monterey, CA, USA (2019.4.23-2019.4.25)] 2019 IEEE 37th VLSI Test Symposium (VTS) - A Secure and Low-overhead Active IC Metering Scheme

Cui, Aijiao, Yang, Yan, Qu, Gang, Li, Huawei

Year:

2019

Language:

english

File:

PDF, 340 KB

english, 2019

39

Nomogram based on shear-wave elastography radiomics can improve preoperative cervical lymph node staging for papillary thyroid carcinoma

Jiang, Meng, Li, Changli, Tang, Shichu, Lv, Wenzhi, Yi, Aijiao, Wang, Bin, Yu, Songyuan, Cui, Xinwu, Dietrich, Christoph Frank

Journal:

Year:

2020

File:

PDF, 1.68 MB

2020

40

[IEEE 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) - Xi'an, China (2019.12.16-2019.12.17)] 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) - Identification of State Registers of FSM Through Full Scan by Data Analytics

He, Chengkang, Cui, Aijiao, Chang, Chip-Hong

Year:

2019

Language:

english

File:

PDF, 1.12 MB

english, 2019

41

[IEEE 2020 IEEE 38th VLSI Test Symposium (VTS) - San Diego, CA, USA (2020.4.5-2020.4.8)] 2020 IEEE 38th VLSI Test Symposium (VTS) - A New Secure Scan Design with PUF-based Key for Authentication

Wang, Qidong, Cui, Aijiao, Qu, Gang, Li, Huawei

Year:

2020

File:

PDF, 395 KB

2020

42

[IEEE 2020 21st International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2020.3.25-2020.3.26)] 2020 21st International Symposium on Quality Electronic Design (ISQED) - How to Retrieve PUF Response from a Fabricated Chip Securely?

Cui, Aijiao, Wang, Yuxi

Year:

2020

File:

PDF, 380 KB

2020